"<pre>
module P3029

title 'P3029'

"(C) Kevan Hashemi 2014"

declarations

"Version 3"

"[11-AUG-14] Command Transmitter for ISL devices. This code implements three actions."
"It can turn on the RF power continuously, turn it off, or transmit a single byte of"
"information in the ISL Command Protocol."

"Pins"
A pin 14;"LVDS input"
B pin 11 istype 'com';"LVDS output"
!RESET pin 9;"RESET"           
CK pin 88;"40 MHz clock input"
RCK pin 89; "32.768 kHz clock input"
!BPA pin 67; "Boost Power Available"
BPEN pin 70 istype 'com';"Boost Power Enable"
LB pin 10 istype 'com';"Loop Back"
TP1..TP4 pin 100,99,98,97 istype 'com';"
X1 pin 28 istype 'com'; "Select Grounded Source"
X2 pin 29 istype 'com'; "Select 146.000 MHz Source"
Y1 pin 37 istype 'com'; "Select U9 Output"
Y2 pin 36 istype 'com'; "Select Grounded Source"
W1 pin 47 istype 'com'; "CA to OUT"
W2 pin 65 istype 'com'; "BA to OUT"
Z1 pin 42 istype 'com'; "CA to U12"
Z2 pin 41 istype 'com'; "CA to OUT"

"Nodes"               
SA node istype 'reg';"Synchornized A."
DA node istype 'com';"Delayed SA"
DDA node istype 'com';"Delayed Delayed SA"
ACTIVE node istype 'reg';"transmission active"
D1..D9 node istype 'reg';"delay pipeline."
DRS0..DRS2 node istype 'reg';"Command Receiver State"
CS node istype 'com';"Command Strobe"
NCS node istype 'com';"New Command Strobe"
AS node istype 'com';"Address Strobe"
NAS node istype 'com';"New Address Strobe"
DS node istype 'com';"Data Strobe"
ER,Q1..Q16 node istype 'reg';"Receiver Bits"
DA0..DA15 node istype 'reg';"Device Address Bits"
DC1..DC16 node istype 'reg';"Device Command Bits"
WAKE node istype 'com'; "WAKE bit"

"Sets"
drs=[DRS2..DRS0];"Command Receiver State"

equations


"LWDAQ Serial Input Decoding"
"---------------------------"

"We synchronize the incoming LVDS logic signal to"
"our 40-MHz clock."
SA:=A;
SA.clk=CK;

"We put SA through a pipeline of registers clocked"
"with CK so that we can generate the delayed timing"
"pulses from the rising edge of SA."
[D1..D9]:= [SA,D1..D8];
[D1..D9].clk= CK;
[D1..D9].aclr=RESET;

"Delayed SA provides is asserted for one CK period 125 ns"
"after any rising edge of SA. We use DA and SA to obtain"
"the LWDAQ data bit. If SA is high with DA, the data bit"
"is one."
DA = D4 & !D5;

"Delayed Delayed SA is asserted for one CK period 250 ns"
"after any rising edge of SA. We use DDA and SA to obtain"
"the LWDAQ ACTIVE bit. If SA is low with DDA, ACTIVE is"
"true."
DDA = D8 & !D9;

"We assert ACTIVE whenever the driver is transmitting"
"a command data bit."
ACTIVE.clk=CK;
ACTIVE.aclr=RESET;
when !SA & DDA then ACTIVE:=1;
when SA & DDA then ACTIVE:=0;
when !DDA then ACTIVE:=ACTIVE;

"We clock the receiver shift register and the entry"
"register with CK, and we clear them on RESET."
[ER,Q1..Q16].clk=CK;
[ER,Q1..Q16].aclr=RESET;

"We shift the receiver bits whenever we have DA"
"asserted. We clock the current value of SA into"
"the entry register (ER), and shift all the other"
"bits over by one. At the beginning of a LWDAQ"
"transmission, ER contains a 1 if the transmission"
"is a command, and 0 if it is an address. At the"
"end of a transmission, ER contains a 1, and Q1"
"to Q16 contain the transmitted sixteen-bit word,"
"either address or command."
when DA then [ER,Q1..Q16]:=[SA,ER,Q1..Q15];
else [ER,Q1..Q16]:=[ER,Q1..Q16].fb;


"LWDAQ Receiver"
"--------------"

"Data Receiver states."
declarations

rest=0;
command_receive=1;
clock_command_register=2;
address_receive=3;
clock_address_register=4;
new_command_strobe=5;
new_address_strobe=6;

equations

drs.clk=CK;
drs.aclr=RESET;

state_diagram drs;
  "Stay in the rest state until we receive ACTIVE."
  "When ACTIVE, we proceed with command receive"
  "if the data bit in ER is one, otherwise an address"
  "receive."
  state rest:
    if ACTIVE then {
      if ER then command_receive
      else address_receive;
   } else rest;

  "We stay in command_receive until !ACTIVE."
  state command_receive:
    if !ACTIVE then clock_command_register
    else command_receive;

  "As we pass through clock_command_register we"
  "indicate that it is time to clock the receiver"
  "bits into the command register."
  state clock_command_register:goto new_command_strobe;

  "As we pass through new_command_strobe we start"
  "any action that should be taken when the new command"
  "arrives. The variable NCS is true when drs is in"
  "the new_command_strobe state."
  state new_command_strobe:goto rest;

  "We stay in address_receive until !ACTIVE."
  state address_receive:
    if !ACTIVE then clock_address_register;
    else address_receive ;

  "As we pass through clock_address_register we"
  "indicate that it is time to clock the receiver"
  "bits into the address register."    
  state clock_address_register:goto new_address_strobe;   

  "As we pass through new_address_strobe we start"
  "any action that should be taken when the new address"
  "arrives. The variable NAS is true when drs is in"
  "the new_address_strobe state."
  state new_address_strobe:goto rest;
equations


"Command Strobe is asserted for one CK period at the"
"end of a command transmission from the LWDAQ driver."
CS = (drs==clock_command_register);

"New Command Strobe follows CS when the new command"
"is already established in the DC registers."
NCS = (drs==new_command_strobe);

"Address Strobe is asserted for one CK period at the"
"end of an address transmission from the LWDAQ driver."
AS = (drs==clock_address_register);

"New Address Strobe follows AS when the new address"
"is already established in the DA registers."
NAS = (drs==new_address_strobe);

"Data Strobe is asserted for one CK period after a"
"solitary low pulse from the LWDAQ driver. The driver"
"uses solitary low pulses that endure for 125 ns and"
"are followed by a > 375 ns high pulse to initiate"
"serial transmission of data from LWDAQ devices of type"
"data_device, like this one."
DS = (SA & DDA & (drs==rest));

"We clock the receiver bits into the command register"
"on CS."
[DC1..DC16].clk=CK;
[DC1..DC16].aclr=RESET;
when CS then [DC1..DC16]:=[Q1..Q16]
else [DC1..DC16]:=[DC1..DC16];

"We clock the receiver bits into the address register"
"on AS."
[DA0..DA15].clk=CK;
[DA0..DA15].aclr=RESET;
when AS then [DA0..DA15]:=[Q1..Q16]
else [DA0..DA15]:=[DA0..DA15].fb;

"Wake the board with DC8."
WAKE = DC8;

"Loop back with DC7.."
LB = DC7;

"Loop back A to B for loopback job."
B = A;


"Operation Codes"
"---------------"

declarations
opcode=[DC6..DC1];"Operation Code"
rf_off_op=0;
rf_on_op=1;
rf_xmit_op=2;
RFSW node istype 'reg'; "Radio Frequency Switch"
TXC node istype 'reg'; "Transmit Command"
TXCI node istype 'com'; "Transmit Command Initiated"
equations


RFSW.clk=CK;
RFSW.aclr=RESET;
when NCS & (opcode==rf_on_op) then {
  RFSW:=1;
} else when NCS & ((opcode==rf_off_op)  # (opcode==rf_xmit_op)) then {
  RFSW:=0;
} else {
  RFSW:=RFSW;
}


TXC.clk=CK;
TXC.aclr=RESET;
when NCS & (opcode==rf_xmit_op) then {
  TXC:=1;
} else when TXCI then {
  TXC:=0;
} else {
  TXC:=TXC;
}


"Command Transmit Timing"
"-----------------------"

declarations
BCK0..BCK1 node istype 'reg'; "Bit Clock"
bck=[BCK1..BCK0];
SRCK node istype 'reg'; "Synchronized RCK"
TXS0..TXS3 node istype 'reg'; "Transmit State"
txs=[TXS3..TXS0];
RFTX node istype 'com,keep'; "Radio Frequency Transmit"
equations

SRCK.clk=CK;
SRCK:=RCK;
bck.clk=SRCK;
bck:=bck+1;

txs.clk=BCK1;
txs.aclr=RESET;
state_diagram txs;
  state 0:if TXC then 1 else 0;
  state 1:goto 2;
  state 2:goto 3;
  state 3:goto 4;
  state 4:goto 5;
  state 5:goto 6;
  state 6:goto 7;
  state 7:goto 8;
  state 8:goto 9;
  state 9:goto 10;
  state 10:goto 11;
  state 11:goto 0;
  state 12:goto 0;
  state 13:goto 0;
  state 14:goto 0;
  state 15:goto 0;
equations

TXCI=(txs!=0);


RFTX = (txs==2)
  # (txs==3) & DC16 
  # (txs==4) & DC15
  # (txs==5) & DC14
  # (txs==6) & DC13
  # (txs==7) & DC12
  # (txs==8) & DC11
  # (txs==9) & DC10
  # (txs==10) & DC9;


"Radio Power  Control"
"--------------------"

declarations
RFON node istype 'com,keep'; "Lamp On"
equations

RFON = RFSW # RFTX;

X1 = !RFON;
X2 = !X1;
Y1 = RFON;
Y2 = !Y1;

BPEN = BPA;

W1 = !BPEN;
W2 = !W1;
Z1 = BPEN;
Z2 = !Z1;


"Test Indicators"
"---------------"

TP1 = 1;
TP2 = BPEN;
TP3 = RFSW # TXC;
TP4 = RFON;

end